Architecture Links

A comprehensive guide to all architecture documentation in C-Kernel-Engine.

Runbooks

v8 Numerical Contracts

How weights, circuits, kernel-map capabilities, complete reduction semantics, deterministic lowering, and parity gates prevent ad hoc runtime dispatch.

circuitskernel mapsreduction contracts
Open Numerical Contracts

Kernel Maps and Provider Selection

How the v8 resolver picks a provider mechanically: the three-level separation, the map field reference, worked memcpy/GEMM/KV-cache examples, the fail-closed ranking rules, and the migration scoreboard.

kernel maps provider selection equivalence groups fail-closed
Open Kernel Maps

X-Ray: Evidence and Divergence Attribution

How CKE proves numerical correctness: the join-don't-instrument pipeline, checkpoint records, three-state verdicts and the honest scorecard, capture neutrality gates, failure classes, fix ownership, and the IR visualizer X-Ray tab.

x-ray parity capture neutrality fix ownership
Open X-Ray

The CKE Constraint Model

Theory of Constraints as runtime math: per-region clocks (compute, cache, DRAM, network, storage), region time as max-plus-unhidden-sync, the exposed-transfer equation, the critical-path shard scheduler, and the prediction-error control loop that ties Scaling, CKU, Memory Tetris and Zip Fusion into one theory.

theory of constraints critical path control loop
Open the Constraint Model

Memory Tetris

Research design for DRAM as a software-managed tensor cache over NVMe: arena slots, prefetch overlap, safety contracts, and X-Ray evidence. Proposed, not implemented.

NVMe tiering prefetch research design
Open Memory Tetris

Distributed CPU: Zip Fusion

Research design for whole-graph distributed CPU scheduling: fused 1-D lanes that unzip to 2-D head-by-context attention, sync boundaries per layer as the metric, and a measurement-first plan. Proposed, not implemented.

distributed CPU zip fusion research design
Open Zip Fusion

v8 Runbook

The scoped operator runbook for the validated v8 lanes. v8 now supports vision (Qwen3-VL) and audio (Whisper Tiny) alongside text-family bring-up; the canonical commands for each lane live on the runbook page.

cks-v8-run ck_run_v8.py Qwen3-VL run_whisper_v8.py
Open v8 Runbook

v8 Vision Encoder Architecture

Design page for how the v8 vision encoder is derived from GGUF + template + lowering, then stitched into the decoder bridge.

qwen3_vl_vision.json build_ir_v8.py encoder → bridge → decoder
Open Vision Encoder Page

Whisper Tiny End-to-End

Audio inference through the same circuit and kernel-contract path: PCM16 WAV to log-Mel, generated FP32 encoder and decoder, nightly audio gates, and the opt-in E2E artifact test.

audio_transformer_*.json run_whisper_v8.py WAV → log-Mel → encoder → decoder
Open Whisper Tiny Page

v7 Inference + Training Runbook

Copy/paste workflow for HF GGUF inference plus true_bpe training and train->infer handoff.

ck_run_v7.py run train_data_pipeline_v7.py ck_chat.py
Open v7 Runbook

v7 Python Authoring Guide

Step-by-step notebook launch order, Python authoring syntax, and the exact handoff boundary from notebooks or ck.nn into the existing v7 scripts.

TrainingProject ck.v7.compile(...) notebooks 01 → 05
Open Python Authoring Guide

v7 Profiling Runbook

Repeatable performance workflow for v7 training kernels with perf, VTune, flamegraphs, and Advisor.

perf vtune advisor
Open v7 Profiling

Kernel Tuning Methodology

CPU-node tuning loop for v8/v7 kernels: practical coherence, fixed-token throughput, CK profile CSV, VTune, Advisor roofline, microkernel labs, and PR logs.

VTune Advisor roofline CK_PROFILE
Open Methodology

Stitched Divergence Harness

Backend parity method for finding the first CK-vs-reference tensor boundary across llama.cpp/mtmd GGUF lanes and future PyTorch adapters.

CKDMP llama.cpp/mtmd first divergence
Open Harness Guide

v7 SVG Dataset Runbook

Operator workflow to generate Stage A pretraining and Stage B midtraining SVG corpora from docs/site/assets/*.svg, then hand off to v7 training.

build_svg_corpus_from_assets_v7.py prepare_ascii_dataset_v7.py curriculum-stage stage_a|stage_b
Open SVG Dataset Runbook

Core

Quantization

Optimization

Infrastructure

Temp / Work in Progress

Draft Documentation
These pages are work-in-progress and may be moved or updated.

Quantization Math Deep Dive

Explains Q5_0/Q8_0 block formats, dequantization math, and AVX-512 vectorization strategy.

Read More

GEMM Memory Layout

Covers quantized block storage, cache blocking strategies, and KV cache layouts.

Read More

Quick Navigation

By Task

Task Documentation
Understanding the system System Overview, Concepts, v7 Backprop IR, v7 CE Parity, v7 Grad-Accum Windows, v7 Runbook, v7 Python Authoring Guide
Implementing new kernels Kernel Reference, Gated DeltaNet Deep Dive, Codegen
Quantization work Quant Fundamentals, Bit Visuals, GGUF Parsing
Performance optimization Kernel Tuning Methodology, GEMM Layout, v7 Train Layout+Dispatch, Threadpool Playbook, SIMD
Debugging & profiling Kernel Tuning Methodology, Profiling, v7 Profiling Runbook, Testing, Stitched Divergence Harness, v7 CE Parity Deep Dive, v7 Runtime Stitch Graph, v7 Runbook, v7 Python Authoring Guide
Operator train + compute workflow v7 SVG Dataset Runbook, v7 Inference + Training Runbook, v7 Python Authoring Guide, v7 Profiling Runbook
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