cpu_features.c File Reference

#include "cpu_features.h"
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <unistd.h>

Go to the source code of this file.

Functions
static void	compute_gemm_params (const CPUInfo *cpu, GEMMParams *params)
void	cpu_features_init (void)
static int	detect_physical_cores (void)
const CPUInfo *	get_cpu_info (void)
const GEMMParams *	get_gemm_params (void)
void	print_cpu_info (void)

Variables
CPUInfo	g_cpu_info = {0}
int	g_cpu_initialized = 0
GEMMParams	g_gemm_params = {0}

Function Documentation

compute_gemm_params()

static void compute_gemm_params ( const CPUInfo *  cpu, GEMMParams *  params  )

static

Definition at line 300 of file cpu_features.c.

                                                                        {
    // Microkernel sizes based on SIMD width
    // MUST match compile-time MR_FIXED/NR_FIXED in gemm_microkernel.c
    if (cpu->has_avx512f) {
        params->MR = 6;   // 6 rows
        params->NR = 32;  // 32 cols (2 x ZMM registers)
    } else if (cpu->has_fma) {
        // AVX2+FMA: can use 6x16 with FMA hiding register spilling
        params->MR = 6;   // 6 rows
        params->NR = 16;  // 16 cols (2 x YMM registers)
    } else if (cpu->has_avx || cpu->has_avx2) {
        // AVX without FMA: use 4x16 to avoid register spilling
        params->MR = 4;   // 4 rows (reduced to fit in 16 YMM registers)
        params->NR = 16;  // 16 cols (2 x YMM registers)
    } else {
        params->MR = 4;
        params->NR = 4;
    }
 
    // Get cache sizes (use defaults if detection failed)
    size_t l1 = cpu->l1d_size > 0 ? cpu->l1d_size : 32 * 1024;   // Default 32KB
    size_t l2 = cpu->l2_size > 0 ? cpu->l2_size : 256 * 1024;    // Default 256KB
    size_t l3 = cpu->l3_size > 0 ? cpu->l3_size : 8 * 1024 * 1024; // Default 8MB
 
    // BLIS-style blocking parameter computation
    // Reference: "Anatomy of High-Performance Matrix Multiplication" (Goto & Van de Geijn)
    //
    // KC: Controls L1 usage
    //   - A micropanel: MR x KC
    //   - B micropanel: KC x NR (streamed from L2)
    //   - Want MR * KC * sizeof(float) to fit in ~half of L1
    //
    // MC: Controls L2 usage
    //   - A block: MC x KC should fit in L2
    //
    // NC: Controls L3 usage / main memory streaming
    //   - B panel: KC x NC
 
    // KC: Controls L1 usage
    // For optimal performance, both A micropanel and B row should fit in L1:
    //   - A micropanel: MR * KC floats
    //   - B row for streaming: NR floats per iteration (small)
    // Use ~25% of L1 for A micropanel to leave room for B and working set
    size_t l1_for_a = (l1 * 25) / 100;
    params->KC = (int)(l1_for_a / (params->MR * sizeof(float)));
 
    // Round KC to multiple of 8 for alignment
    params->KC = (params->KC / 8) * 8;
    if (params->KC < 64) params->KC = 64;
    if (params->KC > 512) params->KC = 512;  // Cap at 512 for better cache fit
 
    // MC: A block = MC * KC * 4 bytes should fit in ~80% of L2
    size_t l2_for_a = (l2 * 80) / 100;
    params->MC = (int)(l2_for_a / (params->KC * sizeof(float)));
 
    // Round MC to multiple of MR
    params->MC = (params->MC / params->MR) * params->MR;
    if (params->MC < params->MR * 4) params->MC = params->MR * 4;
    if (params->MC > 512) params->MC = 512;
 
    // NC: B panel = KC * NC * 4 bytes
    // For L3, we want good streaming, use ~50% of L3 / num_cores
    size_t l3_per_core = l3 / (cpu->num_cores > 0 ? cpu->num_cores : 1);
    size_t l3_for_b = (l3_per_core * 50) / 100;
    params->NC = (int)(l3_for_b / (params->KC * sizeof(float)));
 
    // Round NC to multiple of NR
    params->NC = (params->NC / params->NR) * params->NR;
    if (params->NC < params->NR * 8) params->NC = params->NR * 8;
    if (params->NC > 8192) params->NC = 8192;
}

References CPUInfo::has_avx, CPUInfo::has_avx2, CPUInfo::has_avx512f, CPUInfo::has_fma, GEMMParams::KC, CPUInfo::l1d_size, CPUInfo::l2_size, CPUInfo::l3_size, GEMMParams::MC, GEMMParams::MR, GEMMParams::NC, GEMMParams::NR, and CPUInfo::num_cores.

Referenced by cpu_features_init().

cpu_features_init()

void cpu_features_init

(

void

)

Definition at line 376 of file cpu_features.c.

                             {
    if (g_cpu_initialized) return;
 
    memset(&g_cpu_info, 0, sizeof(g_cpu_info));
    memset(&g_gemm_params, 0, sizeof(g_gemm_params));
 
    // Detect SIMD features
#ifdef X86_CPU
    detect_x86_features(&g_cpu_info);
    detect_x86_cache_sizes(&g_cpu_info);
#endif
 
    // Linux sysfs fallback for cache sizes
#if defined(__linux__)
    if (g_cpu_info.l1d_size == 0) {
        detect_linux_cache_sizes(&g_cpu_info);
    }
#endif
 
    // Detect physical cores
    g_cpu_info.num_cores = detect_physical_cores();
 
    // Compute GEMM parameters based on detected hardware
    compute_gemm_params(&g_cpu_info, &g_gemm_params);
 
    g_cpu_initialized = 1;
}

References compute_gemm_params(), detect_physical_cores(), g_cpu_info, g_cpu_initialized, g_gemm_params, CPUInfo::l1d_size, and CPUInfo::num_cores.

Referenced by get_cpu_info(), get_gemm_params(), and print_cpu_info().

detect_physical_cores()

static int detect_physical_cores ( void  )

static

Definition at line 278 of file cpu_features.c.

                                       {
#if defined(__linux__)
    return detect_linux_physical_cores();
#elif defined(_WIN32)
    SYSTEM_INFO sysinfo;
    GetSystemInfo(&sysinfo);
    // Windows: this gives logical processors, divide by 2 for HT estimate
    return sysinfo.dwNumberOfProcessors / 2;
#elif defined(__APPLE__)
    int cores = 1;
    size_t len = sizeof(cores);
    sysctlbyname("hw.physicalcpu", &cores, &len, NULL, 0);
    return cores;
#else
    return 1;
#endif
}

Referenced by cpu_features_init().

get_cpu_info()

const CPUInfo * get_cpu_info

(

void

)

Definition at line 409 of file cpu_features.c.

                                  {
    if (!g_cpu_initialized) cpu_features_init();
    return &g_cpu_info;
}

References cpu_features_init(), g_cpu_info, and g_cpu_initialized.

Referenced by gemm_init_threads().

get_gemm_params()

const GEMMParams * get_gemm_params

(

void

)

Definition at line 404 of file cpu_features.c.

                                        {
    if (!g_cpu_initialized) cpu_features_init();
    return &g_gemm_params;
}

References cpu_features_init(), g_cpu_initialized, and g_gemm_params.

print_cpu_info()

void print_cpu_info

(

void

)

Definition at line 414 of file cpu_features.c.

                          {
    if (!g_cpu_initialized) cpu_features_init();
 
    printf("=== CPU Info ===\n");
    printf("Physical cores: %d\n", g_cpu_info.num_cores);
    printf("L1 Data Cache:  %zu KB\n", g_cpu_info.l1d_size / 1024);
    printf("L2 Cache:       %zu KB\n", g_cpu_info.l2_size / 1024);
    printf("L3 Cache:       %zu MB\n", g_cpu_info.l3_size / (1024 * 1024));
    printf("Cache line:     %zu bytes\n", g_cpu_info.l1_line_size);
    printf("AVX:            %s\n", g_cpu_info.has_avx ? "yes" : "no");
    printf("AVX2:           %s\n", g_cpu_info.has_avx2 ? "yes" : "no");
    printf("AVX-512F:       %s\n", g_cpu_info.has_avx512f ? "yes" : "no");
    printf("AVX-512BW/DQ/VL:%s/%s/%s\n",
           g_cpu_info.has_avx512bw ? "yes" : "no",
           g_cpu_info.has_avx512dq ? "yes" : "no",
           g_cpu_info.has_avx512vl ? "yes" : "no");
    printf("AVX-512 VNNI:   %s\n", g_cpu_info.has_avx512_vnni ? "yes" : "no");
    printf("AVX-512 BF16:   %s\n", g_cpu_info.has_avx512_bf16 ? "yes" : "no");
    printf("AMX tile/int8/bf16: %s/%s/%s\n",
           g_cpu_info.has_amx_tile ? "yes" : "no",
           g_cpu_info.has_amx_int8 ? "yes" : "no",
           g_cpu_info.has_amx_bf16 ? "yes" : "no");
    printf("FMA:            %s\n", g_cpu_info.has_fma ? "yes" : "no");
    printf("\n=== GEMM Blocking Parameters ===\n");
    printf("MR (microkernel rows): %d\n", g_gemm_params.MR);
    printf("NR (microkernel cols): %d\n", g_gemm_params.NR);
    printf("MC (M block):          %d\n", g_gemm_params.MC);
    printf("NC (N block):          %d\n", g_gemm_params.NC);
    printf("KC (K block):          %d\n", g_gemm_params.KC);
    printf("\n");
}

References cpu_features_init(), g_cpu_info, g_cpu_initialized, g_gemm_params, CPUInfo::has_amx_bf16, CPUInfo::has_amx_int8, CPUInfo::has_amx_tile, CPUInfo::has_avx, CPUInfo::has_avx2, CPUInfo::has_avx512_bf16, CPUInfo::has_avx512_vnni, CPUInfo::has_avx512bw, CPUInfo::has_avx512dq, CPUInfo::has_avx512f, CPUInfo::has_avx512vl, CPUInfo::has_fma, GEMMParams::KC, CPUInfo::l1_line_size, CPUInfo::l1d_size, CPUInfo::l2_size, CPUInfo::l3_size, GEMMParams::MC, GEMMParams::MR, GEMMParams::NC, GEMMParams::NR, and CPUInfo::num_cores.

Variable Documentation

g_cpu_info

CPUInfo g_cpu_info = {0}

CPU Feature Detection and Cache-Aware Parameter Tuning

Detects CPU features, cache sizes, and core counts at runtime. Computes optimal GEMM blocking parameters based on actual hardware.

Definition at line 28 of file cpu_features.c.

{0};

Referenced by cpu_features_init(), get_cpu_info(), and print_cpu_info().

g_cpu_initialized

int g_cpu_initialized = 0

Definition at line 30 of file cpu_features.c.

Referenced by cpu_features_init(), get_cpu_info(), get_gemm_params(), and print_cpu_info().

g_gemm_params

GEMMParams g_gemm_params = {0}

Definition at line 29 of file cpu_features.c.

{0};

Referenced by cpu_features_init(), get_gemm_params(), and print_cpu_info().